Our On-Chip Power Supply Noise Monitor has been developed to overcome the characterization challenges of low-power, high-performance interfaces and electronic systems. It is a compact IP block embedded on-chip and works in conjunction with our LabStation™ Validation Platform to enable noise measurements directly on the chip.
This is important because, one of the technical challenges in the development of low-power, high-performance complex IPs and electronic systems is accurately characterizing power supply noise and understanding how that noise affects circuit performance. The conventional approach of hand-probing outside the chip package is slow, error prone, and often misses high-frequency noise that is filtered out by the package. These difficulties only increase with further miniaturization of packaging technology in smartphones and tablets including integrated package-on-package (PoP) and 2.5D/3D packages.
Download the brief by completing the form on the right.